NAND Gate

The NAND gate is a combination of an AND gate and NOT gate. They are connected in cascade form. The logic symbol for the gate is shown below.

NAND-GATE-FIG-9The logic circuit of the NAND gate is shown below.

NAND-GATE-FIG-10From the logic circuit, the output can be expressed as

NAND GATE EQ

The equation is read as “Z equals NOT A AND B”. Since the logic circuit involves an AND gate followed by an inverter. The output can only be low when both the inputs are high.

The truth table of the NAND gate is given below.

ABZ
001
011
101
110

From the truth table of the gate it is clear that, all the inputs must be high to get a low output and if any of the input is low, the output obtained will be high. If any one of the input is also high the output will be high that is 1.

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